Engineering Blog
Practical insights, architectural deep dives, and real project experiences from engineer to engineer.
Edge AI on FPGAs: Hardware Selection and Deployment Strategies
Porting FP32 CNNs to sub-5W edge FPGAs: deterministic latency, QAT quantization, and a ~20× speedup achieved in a demo using our HADQ-Net approach.
One RTL, Every Vendor: Inside RunX's Multi-Vendor FPGA Strategy
How RunX designs FPGA RTL that ports cleanly across Xilinx, Altera, Lattice, and Microchip and why that discipline is a business strategy, not just an engineering nicety.
FPGA Families and Choosing the Right FPGA
Which FPGA board or chip is best for your projects? Manufacturers, FPGA families, and all the essential criteria you need to know to make the right choice.
PS and PL Architecture in FPGA SoC Devices
What Are PS and PL in an FPGA SoC? Applied to a Radar Project: How did we partition the work between PS and PL on the Zynq UltraScale+ MPSoC? AXI, DMA and datapath decisions, measurements, and a practical checklist from our radar project.
FPGA Hardware Resources: LUTs, BRAM, DSP, Clocking, and Routing
A beginner-friendly tour of the five physical resources that make up an FPGA's fabric, with diagrams for each.
What Is an FPGA? A Practical Guide | RunX Technology
An FPGA does not run your code - it becomes your circuit. What FPGAs are, how they differ from CPUs, GPUs and ASICs, and when to choose one.